An introduction to Power Electronic Devices - 3.What is a Transistor

§3. What is a Transistor?

Before introducing half-controlled devices and full-controlled devices, it is necessary to briefly introduce bipolar junction transistors (BJT).

3.1 Introduction to Transistors

The transistor (also known as semiconductor transistor or Bipolar Junction Transistor, BJT) is a bipolar device with three terminals and two PN junctions. The transistor is one of the basic components of semiconductor devices and also one of the core components. Since its birth in the 1940s, the transistor has completely changed the structure of electronic circuits, triggered a solid-state revolution, and promoted the emergence of integrated circuits and large-scale integrated circuits. The transistor has a current amplifying function, and can control a large change in collector current with a very small change in base current, so it is often used as a contact-less switch in electronic circuits. The switching frequency of the transistor is high, and there is no mechanical service life, so it has a significant advantage over electromagnetic relays and mechanical switches.

3.2 How does Transistor work?

3.2.1 Basic Structure of Transistors

The transistor is a three-layer semiconductor structure, which has one more PN junction than Power Diode. These two closely spaced PN junctions divide the transistor into three parts with different areas and doping concentrations -- the base region is very thin (3-30μm) and the doping concentration is low; the area of emitter region is small and the doping concentration is high; the area of collector region is large and the doping concentration is low. The PN junction between the collector region and the base region is called the collector junction J₁. The PN junction between the emitter region and the base region is called the emitter junction J₂.

According to the material, transistors can be divided into silicon transistors and germanium transistors. According to the doping composition, transistors can be divided into PNP transistors and NPN transistors -- under forward bias, the emitter region of PNP transistors emits holes, and its direction is the same as the direction of current, so the arrow in the electrical symbol goes from the emitter to the base; under forward bias, the emitter of the NPN transistors emits free electrons, and its direction is opposite to the direction of the current, so the arrow in the electrical symbol goes from the base to the emitter.

3.2.2 Working Principle of Transistors

Take the NPN transistor as an example. The NPN transistor can be regarded as two equivalent diodes (VD1 and VD2), as shown in Figure 11, a. Because the N- region of VD1 has low a doping concentration and a large area, it is not prone to avalanche breakdown, so it can withstand a large reverse voltage. But in forward bias, the forward current of VD1 is very small, so VD1 is very suitable for working in reverse cut-off state. VD1 will produce a reverse saturation current I_CBO when VD1 works in the reverse state, but the doping concentration of N- region and P region is very low, so the I_CBO is very small. Because the N+ region of VD2 has a high doping concentration and a small area, it is prone to avalanche breakdown, so its reverse withstand voltage capability is very poor. But in forward bias, VD1 can generate a very large forward current, so VD2 is very suitable for working in the forward conduction state. When VD2 works in the forward state, it will generate two currents, one is the current I_EP generated by the holes flow of the P region, and the other is the current I_EN generated by the electrons flow of the N+ region. Since the doping concentration of the P region of VD1 is lower than that of the N+ region, I_EN is greater than I_EP. When we know the working principle of these two equivalent diodes, it is easy to understand the working principle of the NPN transistor.

Connect the NPN transistor through the common emitter connection method -- a collector power supply E_C and collector resistance R_C are connected in series to the collector and the emitter; a base power supply E_B and a base resistance R_B are connected in series to the base and the emitter. In this circuit, current flows into the NPN transistor from the collector and base, and flows out of the NPN transistor from the emitter -- the total current flowing in from the collector is the collector current I_C; the total current flowing in from the base is the base current I_B; the total current flowing out from the emitter is the emitter current I_E. The linear relationship between I_C and I_E is common base current gain α, and the linear relationship between I_C and I_B is common emitter current gain β. It is worth noting that due to the difference in doping concentration, the collector junction J₁ is not suitable for forward bias, and the emitter junction J₂ is not suitable for reverse bias. If the collector and emitter are reversely connected, the possibility of NPN transistor breakdown will increase significantly.

Cut-off State: The structure of NPN makes there is always a PN junction in a reverse bias state. When no voltage is applied to the base, even if a large voltage (less than breakdown voltage BV_CEO) is applied to the collector and the emitter, the NPN transistor cannot be turned on (but there is a small leakage current I_CEO).

Active State: VD1 and VD2 must work at the same time to turn on the NPN transistor, so a certain voltage needs to be applied to the base to make J₁ reverse biased (U_BC<0) and J₂ forward biased (U_BE> U_TO). When the NPN transistor is turned on, its internal current is a bit different from when the equivalent diodes worked separately, as shown in Figure 11, b. The free electrons injected from the N+ region into the P region do not completely recombine with the holes in the P region. Due to the reverse bias of J₂, a part of the free electrons will pass through the P region and be directly injected into the N- region, and generate a reverse current I_CN. When the NPN transistor is working in an active state, a small change in the base current I_B of will cause a large change in the collector current I_C. This phenomenon is called conductance modulation effect. This phenomenon is like a tiny input current being amplified into a huge output current, so the active state is also known as the amplification state.

Saturation State: With the increase of I_B, the concentration of holes in the P region decreases, I_EP decreases, and the depletion region of J₁ keeps increasing. At the same time, since the free electrons injected from the N+ region into the P region are getting less and less, I_BN has dropped to near the minimum value, and the amplification effect of I_B on I_C has begun to weaken. When I_B and I_C no longer have a linear relationship, the NPN transistor begins to enter a saturated state. At this time, as I_B increases, I_C slowly increases, and the saturation depth of the NPN transistor also begins to deepen. When almost all the free electrons in the N+ region are injected into the N- region, the base potential is the same as the collector potential (U_BC=0). At this time, the NPN transistor is in a deep saturation state, and I_C is completely unaffected by I_B. It should be noted that as the depletion region of J₁ increases, the possibility of avalanche breakdown on J₁ also increases.

* Calculation Formula of Transistor

I_C = I_CN + I_CBO, (1)

I_B = I_BN + I_EP - I_CBO, (2)

I_E = I_C + I_B = I_CN + I_BN + I_EP, (3)

because I_C > 0, then we get I_E / I_C = I_B / I_C + 1; (4)

α = I_CN / I_E = (I_C - I_CBO) / I_E, (5)

β = I_CN / (I_B + I_CBO) = (I_C - I_CBO) / (I_B + I_CBO), (6)

because I_C > I_B >> I_CEO >> I_CBO ≈ 0, if ignoring all the leakage current, we can get α ≈ I_C / I_E, β ≈ I_C / I_B, (7)

then we can get 1/α = 1/β + 1, (8)

so the relation between α and β is: α = β / (1 + β), β = α / (1 - α). (9)

* Leakage Current

Both the collector junction reverse saturation current I_CBO and the penetration current I_CEO are unavoidable leakage currents in the transistor. By opening the emitter of the transistor (I_E=0) and applying voltage to the collector and the base, the value of I_CBO can be measured, as shown in Figure 12, a. By opening the base of the transistor (I_B=0) and applying voltage to the collector and the emitter, the value of I_CEO can be measured, as shown in Figure 12, b.

The generation mechanism of the collector junction reverse saturation current I_CBO is shown in Figure 11, a.

The generation mechanism of the penetration current I_CEO is as follows: Under the action of an external electric field, the majority carriers in the collector region move away from the PN junction, widening the space charge region, and the built-in electric field of the collector junction J₁ is enhanced, which is conducive to drift motion; the majority carriers in the emitter region move closer to the PN junction, narrowing the space charge region, and the built-in electric field of the emitter junction J₂ is weakened, which is not conducive to drift motion. Therefore, under the action of the built-in electric field, the minority carriers in the base region drift to the collector region through J₁. At the same time, the minority carriers in the collector region drift to the base region through J₁, part of which participates in the recombination of the base region, and the other part diffuses to the emitter region through J₂. Due to the low doping concentration of the base region, the proportion of minority carriers participating in the recombination of the base region is very low. It is not difficult to find that this process is very similar to the generation mechanism of I_EN when the transistor is turned on. Therefore, there is a linear relationship between I_CEO and I_CBO, I_CEO = (1 + β) * I_CBO. However, due to the low doping concentration of the collector region and the base region, the value of I_CEO is very low and can usually be ignored. The I_CEO of silicon transistors is generally less than 100nA; the I_CEO of germanium transistors is generally less than 100μA.

* Conductance Modulation Effect

Conductance (G) is the reciprocal of resistance, and the unit is Siemens (S). Conductance modulation effect (also known as the base region conductivity modulation effect, or Webster effect) is one of the basic characteristics of bipolar transistors (BPT), which refers to the phenomenon that the conductivity of the base region increases significantly (or the resistivity of the base region decreases significantly) when the working current of the bipolar transistor is large. Except BJT, other bipolar transistors such as SCR, GTO, GTR and parasitic transistors in IGBT all have conductivity modulation effect. In addition to the Webster effect, when the working current of the bipolar transistor is large, the Early effect (the phenomenon that the changes of the collector junction voltage will lead to the changes of the width of the base region) and the Kirk effect (the phenomenon that the width of the base region increases) will also appear.

3.3 Main Parameters of Transistors

1- Common Base Current Gain α

Common base current gain α (the full name is "hybrid parameter forward current gain, common base", HFB), which is determined by the emitter efficiency factor and the base region transport factor, α = F_E * F_B. When the base is zero-biased (U_BC = 0), the base short-circuit amplification factor α₀ is determined by the emitter efficiency factor, the base region transport factor, the collector efficiency factor and the avalanche multiplication factor, α₀ = F_E * F_B * F_C * M.

The emitter efficiency factor F_E is the ratio of the electron current I_EN injected into the base region to the emitter current I_E, F_E = I_EN / I_E = I_EN / (I_EN + I_EP) = 1 / [1 + (I_EP / I_EN) ]. By reducing the doping concentration of the base region, the total amount of impurities in the base region is much smaller than the total amount of impurities in the emitter region, which can effectively increase the number of minority carriers injected into the base region from the emitter region. The closer the ratio of I_EP to I_EN is to 0, the higher the emission efficiency of the transistor.

The base region transport factor F_B is the ratio of the electron current I_CN that reaches the collector region to the electron current I_EN injected into the base region, F_B = I_CN / I_EN. By reducing the width of the base region, the time that carriers from the emitter region stay in the base region can be effectively shortened, thereby increasing the number of minority carriers that transit the base region. The smaller the width of the base region, the smaller the recombination loss of electrons from the emitter region in the base region.

The collector efficiency factor F_C is the ratio of the collector current I_C to the electron current I_CN that reaches the collector region, F_C=I_C/I_CN.

The avalanche multiplication factor M is used to describe the avalanche multiplication effect when the reverse voltage of the collector junction increases to close to the avalanche breakdown voltage. It is usually estimated with the following formula, M = 1 / [1 - (V / V_B) ^n], n is determined by the material of the PN junction (silicon: n=1.5-4; germanium: n=2.5- 8); V_B is the reverse breakdown voltage of the collector J₁; V is the voltage across the collector junction. When the absolute value of V tends to the absolute value of V_B, M tends to infinity, and avalanche breakdown will occur in the PN junction.

Generally, hFB(α) is used to express the common base DC current gain, hFB(α) = I_C / I_E, and its range is usually 0.95-0.99; hfb(α) is used to express the common base AC current gain, hfb(α) = ΔI_C / ΔI_E. In general, hfb(α) ≈ hFB(α).

2- Common Emitter Current Gain β

Common emitter current gain β (the full name is "hybrid parameter forward current gain, common emitter", HFE) is the ratio of collector current to base current, and its value is usually much larger than 1. Generally, hFE(β) is used to express the common emitter DC current gain, hFE(β) = I_C / I_B, which can be measured directly by a multimeter; hfe(β) is used to express the common emitter AC current gain, hfe(β) = ΔI_C / ΔI_B. The current amplification factor (or forward current gain) of the transistor usually refers to the common emitter current gain β.

3- Common Collector Current Gain γ

Common collector current gain γ (the full name is "hybrid parameter forward current gain, common collector", HFC) is the ratio of emitter current to base current. Generally, hFE(γ) is used to express the common collector DC current gain, hFC(γ) = I_E / I_B; hfc(γ) is used to express the common collector AC current gain, hfc(γ) = ΔI_E / ΔI_B. This parameter is rarely used in normal times.

4- Threshold Voltage U_TO

The threshold voltage U_TO is the voltage that triggers the conduction of the emitter junction of the transistor.

5- Characteristic Frequency fT

The characteristic frequency fT is also called the gain bandwidth product, which can be defined as the operating frequency of the transistor when β=1. If the operating frequency f₀ and the high-frequency current amplification factor β are known, the characteristic frequency fT can be obtained, fT=β* f₀. As the operating frequency increases, the magnification will decrease. If the operating frequency of the transistor is equal to the characteristic frequency (f₀ = fT), the transistor completely loses the current amplification function; if the operating frequency of the transistor is greater than the characteristic frequency (f₀> fT), the transistor will not work normally.

6- Maximum Operating Voltage U_CEM

The maximum operating voltage U_CEM is the rated voltage of the transistor. When the maximum operating voltage U_CEM is exceeded, the transistor will be broken down.

7- Maximum Collector Allowable Current I_CM

The maximum collector allowable current I_CM is the rated current of the transistor. It is usually specified that the collector current I_C corresponding to when the current gain β drops by half from the maximum value is I_CM. In order to ensure the safety of use, it is generally necessary to leave a double margin.

8- Maximum Collector Dissipation Power P_CM

The maximum collector dissipation power P_CM is the power at which the transistor reaches the highest junction temperature under the highest operating temperature (usually 25°C). When the transistor reaches the maximum junction temperature, its internal PN junction structure will be permanently destroyed.

3.4 Basic Characteristics of Transistors

The relationship between the parameters of the transistor during stable operation (these parameters are usually fixed values or changing slowly) is called static characteristics. The relationship between the parameters of the transistor during the turn-on process and the turn-off process (these parameters are usually changing sharply) is called dynamic characteristics. If there is only a DC signal in the input signal of the transistor, it is called DC operation (or static operation). If there is an AC signal in the input signal of the transistor, it is called AC operation (or dynamic operation).

For the NPN transistor (common emitter connection), its input is the base and the output is the collector, so its input current is I_B, the input voltage is U_BE, and the output current is I_C (output from the resistance R_C in the output circuit), the output voltage is U_CE.

3.4.1 Static Characteristics of Transistors

The static characteristics of the transistor are divided into input characteristics (relationship between input current and input voltage), output characteristics (relationship between output current and output voltage), temperature (the influence of temperature on input characteristics and output characteristics) and safe operating area (stable operating conditions of the transistor).

1- Input Characteristics

The input characteristic of the transistor is similar to the forward input characteristic of the power diode, as shown in Figure 13.

When U_CE is fixed value and U_BE>U_TO, the base current I_B increases with the increase of U_BE.

When U_CE increases, U_TO increases and the input characteristics curve moves to the right. This is because with the increase of U_CE, part of the carriers that should be injected into the base region from the emitter region pass through the base region and are directly injected to the collector region, so the carrier concentration in the base region is too low to open the emitter junction (that is, the diffusion current of the emitter junction is less than or equal to the drift current). Therefore, it is necessary to increase U_BE to make more carriers be injected into the base region from the emitter region (that is, the threshold voltage increases), and the input characteristic curve also moves to the right. When U_CE increases to a certain extent, most of the carriers that can be injected into the base region from the emitter region are collected to the collector region, so even if U_CE continues to increase, the input characteristics of the transistor can hardly be changed.

2- Output Characteristics

Before introducing the output characteristics of transistor, it is necessary to introduce the concept of DC load line. The DC load line is the volt-ampere characteristic curve of collector load R_C (output terminal resistance) when the transistor is working in static state, I_C = (E_C - U_CE) / R_C. When the transistor enters the off state, it is equivalent to the collector circuit entering the off state. At this time, U_CE=0, the voltage on R_C is equal to the power supply voltage E_C. When the transistor enters the on state, I_CM is the possible maximum value of the output current I_C, that is, the maximum current flowing through R_C. Mark these two points in a rectangular coordinate system with I_C as the Y axis and U_CE as the X axis, and draw a line segment, that is, the DC load line. The intersection of the DC load line with the Y-axis is called the saturation point, and the intersection with the X-axis is called the cut-off point. The slope of the DC load line is the resistance value of R_C.

The intersection of the DC load line and the output characteristics curve of the transistor is called the quiescent operation point, or Q point. When the transistor works at the static operating point, no matter how the AC signal in the input signal changes, the transistor can be guaranteed to work in a stable amplification state (that is, the emitter junction is forward biased, and the collector junction is reverse biased), and no nonlinear distortion will occur. When selecting the Q point, try to stay away from the saturation region (to avoid saturation distortion) and cut-off region (to avoid cut-off distortion) of the transistor to obtain the best amplification effect.

Since the transistor mainly outputs through the reverse current of the collector junction J₁, its output characteristic curve is very similar to the static characteristic curve under the reverse bias of the power diode, as shown in Figure 14. Compared with power diodes, transistors have three working states. In order to understand the relationship between the output current I_C and the input current I_B intuitively, the X axis can be extended to the left, and the left part of the X axis can be regarded as the positive X half axis of I_B. The Q points are projected to the second quadrant, which divide the characteristic curve of I_C and I_B into four sections: 0, A, B and C. These sections correspond to working region of the transistor.

Cut-off Region (Section 0): When U_BE≤U_TO or I_B=0, the emitter junction is in the off state. At this time, even if the collector junction is reverse biased (U_BC<0), the transistor is still in the off state (in fact, there is a very small penetration current I_CEO). Similarly, if the collector junction is in the off state (I_C=0), even if the emitter junction is forward biased (U_BE>0), the transistor will not be turned on. Therefore, the cut-off condition of the transistor is, I_C * I_B = 0.

Active Region (Section A): When the emitter junction is forward biased and greater than the threshold voltage (U_BE>U_TO>0), I_B>0, if the collector junction is reverse biased (U_BC≤0), the transistor works in the active region (amplification region). At this time, the value of I_C has nothing to do with U_CE, but is only affected by I_B, and there is a linear relationship between I_B and I_C, I_C = β * I_B.

Saturation Region (Section B and Section C): As the base current increases, the number of holes in the base region decreases, and the carriers injected into the base region from the emitter region also decreases, and the depletion layer of the base region widens. When the saturation boundary is reached, the amplification capability of the transistor begins to weaken (β' = ΔI_C / ΔI_B < β), I_B and I_C no longer have a linear relationship, and the transistor starts to enter the quasi-saturation state (shallow saturation state, Section B). When the number of holes in the base region drops to a critical value, the potential of the base region is the same as the potential of the collector region, that is, the collector junction J₁ is in zero bias (U_BC=0), and the base current completely loses the amplification effect (β' = ΔI_C / ΔI_B =0), and the transistor enters the fully saturated state (deep saturation state, Section C).

When the transistor is shallowly saturated, the base current I_B is small and the conduction voltage drop is large, that is, the equivalent resistance of the transistor is large, so it is easy to exit the saturation state. When the transistor is deeply saturated, the base current I_B is large and the conduction voltage drop is small, that is, the equivalent resistance of the transistor is small, and as I_B increases, the saturation of the transistor will continue to deepen, so it is difficult to exit the saturation state. In actual operation, when I_B(sat) = E_C / (β * I_CM), it can be considered that the transistor has entered the deep saturation state, which is the saturation state in the usual meaning. Sometimes in order to accelerate the transistor into the deep saturation state, a base current that is several times I_B(sat) is applied. It should be noted that the working status of the transistor is also affected by the output resistance R_C -- the smaller the output resistance R_C, the larger the saturation current I_C, and the larger the saturation voltage drop U_CE, and the larger the saturation trigger current I_B. As the output resistance R_C decreases, the saturation current I_C will approach I_CM, making the transistor easily burned. If the output resistance R_C is close to 0, even if the transistor is burned out, it cannot enter the saturation state. Therefore, a larger output resistance can make the transistor more likely to enter the saturation state.

3- Temperature

The increase in temperature will cause the intrinsic thermal excitation of the semiconductor, which will increase the carrier concentration inside the semiconductor and increase its conductivity. An increase in conductivity will cause an increase in leakage current, a decrease in threshold voltage, an increase in current gain and etc. Therefore, the input characteristic curve of the transistor will move to the right as the temperature rises, and the output characteristic curve of the transistor will move up as the temperature rises. The increase in temperature will also increase the possibility of the transistor thermal breakdown, so in actual use, sufficient heat dissipation conditions should be equipped to the transistor.

4- Safe Operating Area

If the model of a transistor is known, its P_CM parameters is also known. Through P_CM=I_C * U_CE, P_CM curve can be drawn. The I_CM, U_CEM, P_CM curves can determine the safe operating area (SOA) of the transistor, in this area, the transistor can work stably without damage. The area outside the safe operating area is a hazardous area. In the hazardous area, the temperature of the transistor will increase significantly, making it more susceptible to thermal breakdown. Therefore, the transistor should be avoided to work in hazardous areas.

3.4.2 Dynamic Characteristics of Transistors

1- Turn-on process

When the turn-on condition (U_BE> U_TO) is met, the transistor will be turned on. The turn-on process of the transistor is divided into the delay time t_d, the rise time t_r, and the diffusion time t_s.

The delay time t_d is the time taken from 10% I_B1 to 10% I_C1. This time period is the time required to charge the barrier capacitor.

The rise time t_r is the time taken for I_C to go from 10% I_C1 to 90% I_C1. During this time period, I_C rose sharply.

The diffusion time t_s is the time taken for I_C to go from 90% I_C1 to 100% I_C1. This time period is the time required to charge the diffusion capacitor.

The calculation formula of the turn-on time: t_on=t_d + t_r + t_s

2- Turn-off process

When the cut-off condition (I_B=0) is met, the transistor will be turned off. The turn-off process of the transistor is divided into the storage time t_s, the fall time t_f, and the tail time t_t.

The storage time t_s is the time taken from 90% I_B1 to 90% I_C1. This time period is the time required to remove the carriers stored in the base region during saturated conduction.

The fall time t_f is the time taken for I_C to fall from 90% I_C1 to 10% I_C1. During this time period, I_C dropped sharply.

The tail time t_t is the time taken for I_C to fall from 10% I_C1 to I_CEO. This time period is the time required for the recombination of the remaining carriers.

The calculation formula of the turn-off time: t_off = t_s + t_f + t_t